All operational amplifiers have a maximum output voltage slew rate. If an input signal at an input of an operational amplifier changes rapidly, it can produce parasitic non-linear distortions. By arranging for the slew rate to be large enough, such distortions can be prevented.
A typical folded cascode operational amplifier is shown in FIG. 1. The differential input signal at inputs IP and IM changes the drain current of transistors M1 and M2, which folds to the outputs OP and OM, via transistors M6 and M7. Transistors M8, M9, M10 and M11 form a high impedance cascode load of the amplifier. This type of amplifier has excellent small signal frequency response but the large signal behaviour often suffers from an insufficiently small output slew rate.
It is clear that the maximum positive output current does not exceed the current through transistors M8 and M9 and that the maximum negative output current is limited by the difference between the currents of transistors M4 (M5) and M8 (M9). These output currents limit the positive and negative slew rates of the amplifier. With a fully differential amplifier, the positive and negative slew rates should be equal. If they are not equal, during the differential input settling time, a common mode component is produced at the differential output OP and OM, which is often undesirable. In order to ensure that the slew rates are equal, the current through transistors M4 and M5 is usually equal to twice that of transistors M10 and M11.
In order to increase the cascode amplifier's slew rate, the DC current of transistors M4 and M5 must be increased. This requires increasing the size of these transistors. This, however, has a disadvantage. As the transistor size is increased, the internal parasitic capacitance of transistors M4, M5, M6 and M7, which are responsible for signal propagation, is increased. Thus, this method leads to a degradation in the amplifier's small signal response and to the lowering of the secondary pole frequency.
A different method of increasing the output slew rate is described in an article `A high performance micropower switched capacitor filter` by R. Castello, P. Gray, in IEEE Journal of Solid State circuits, VOL. 20, page 1122-1132, Dec 1985. This method is based on using dynamically changing bias current. The bias current changes according to the input signal. Since the bias current changing circuit introduces some delay, the frequency response of such an amplifier suffers dramatically. This type of amplifier has a unity gain frequency which is two to three times lower than that of the amplifier shown in FIG. 1.
It is also known to use a complementary input stage. Such an input stage helps to control the current in transistors M8 and M9, but adds a parallel high frequency signal path. This produces a problem of matching two high frequency signal paths. If the frequency responses of these paths are not exactly equal, additional poles appear in the amplifier's transfer function. This significantly slows down the small signal transient response. In contemporary CMOS technology processes, such precise matching can be achieved, but only using expensive and complex methods, such as laser trimming.
There is therefore a requirement to provide an operational amplifier which has a high slew rate and which does not suffer from the above problems and disadvantages.